Digital Up-Converter Overview

The DUC is a halfband polyphase filter that both interpolates and filters the output of the channel filter. This filter is the first in a series of filters that converts the baseband signal into a passband signal. The filter has the property that the out of band attenuation is at least -60dB.

Digital Up-Converter Source

Matlab Design Files

As with the channel filter, we were given MATLAB files as a starting point for the design. The files were then modified to suit our specific needs.

Matlab Files

Matlab Design Plots

FPGA Implementation

Vivado HLS Design Files

After the filter was designed in MATLAB, it was then designed in Vivado HLS. The link for the HLS source code is below:

Vivado Design Files

Vivado Design Results

The following is the calculated RMS error from the HLS test bench:

number of input test vectors = 20000
number of output test vectors = 40000
Real rms error = 0.000191029
% Real rms error = 0.0191029%
Imaginary rms error = 0.000186151
% Imaginary rms error = 0.0186151%

Next are the resource utilization and timing results for the solution:

Matlab Error Calculations

Finally, the MATLAB error calculations were performed against the HLS filter output and the golden reference data. The MATLAB RMS error calculations are below and match the HLS calculations:

Number of output samples = 40000
RMS error, real = 0.000191
%RMS error, real = 0.019103%
RMS error, imaginary = 0.000186
%RMS error, imaginary = 0.018615%

Matlab Output Plots

Second Stage DUC

The second halfband filter was created in MATLAB only. The composite frequency response of the channel filter and two halfband filters is below: